The present invention generally relates to the fabrication of conductive circuit patterns on a substrate, and more particularly to the production of fine-geometry circuit lines using an improved chemical etching process.
Rapid advances in computer technology have created a corresponding need for improved circuit fabrication methods. Basic circuit manufacturing techniques first involve obtaining a desired substrate (e.g. ceramic) on which the circuit is to be patterned. Thereafter, a metallic layer (e.g. gold) is applied to the substrate using conventional processes. Such processes typically involve the screen-printing of metallic inks and the like. The substrate and metal materials thereon are then fired to produce a thick metallic film on the substrate. Alternative methods for applying metal layers onto a substrate are described in Elliott, D. J., Integrated Circuit Fabrication Technology, McGraw-Hill Book Company (New York), pp. 1-41, ISBN No. 0-07-019238-3 (1982) which is incorporated herein by reference. Such methods include but are not limited to flash evaporation, filament evaporation, electron beam evaporation, and sputtering. After the metal layer is applied, a photoresist layer is applied directly onto the metal layer. Photoresist materials are light-sensitive and may be classified as either "positive" or "negative". Positive photoresist materials create a patterned image corresponding to the image which appears on the mask used in the process. Negative photoresist materials create a patterned image which is the exact reverse of the image normally produced by positive photoresist materials.
After the application of photoresist materials, they are conventionally "softbaked" which primarily involves the removal of various solvents and the like therefrom. Softbaking typically involves heating the substrate and materials thereon to a temperature of about 85-100 degrees C. using conventional methods including but not limited to known microwave and infra-red heating techniques. Temperature control during the softbake stage is important. As described in Elliott, supra, softbaking at a low temperature generally increases photoresist sensitivity, thereby making it more difficult to achieve proper circuit line width. In contrast, softbaking at excessively high temperatures reduces the photosensitivity of the resist materials, causing potential circuit definition problems.
After softbaking, a mask is positioned over the substrate. The mask has a plurality of open regions therein which correspond to the desired circuit pattern in the final product. Typical masks are produced from chromium, and are described in greater detail below. Light is then shined through the mask in order to create exposed and unexposed regions of the photoresist materials. A typical light source would involve a mercury-arc lamp known in the art capable of producing light within a wavelength range of about 200-500 nm with an intensity of about 5-10 mW/cm.sup.2. However, other conventional light sources may be used for this purpose. Thereafter, a chemical developer known in the art is applied to the imaged photoresist layer. This material is designed to remove exposed regions of positive photoresist material or unexposed regions of negative photoresist material. As a result, various portions of the underlying metal layer are uncovered.
The next basic step in the circuit fabrication process involves removal of the uncovered portions of the underlying metal layer. This stage typically requires the use of a chemical etchant which is designed to react with and remove the uncovered metal portions. For example, in order to remove gold from a substrate, a suitable etchant known in the art for this purpose consists of a mixture of dissolved I.sub.2 and dissolved KI. However, there are many important factors which must be considered in order for etching to occur effectively using this system.
Specifically, great care must be taken so that the removal process leaves accurately-defined regions of photoresist-covered metal on the substrate in order to produce the desired final product. In producing the final product, it is often desirable to create fine-geometry circuit lines which have a minimal width. Likewise it is advantageous to produce a circuit pattern in which the circuit lines are minimally spaced from each other. Circuit structures having these characteristics not only increase the amount of conductive pathways which may be placed on a substrate, but also provide higher frequency responses. For example, a conductive line in a microwave hybrid application which is about 50 microns wide will allow the formation of inductors with increased frequency performance (e.g. between about 8-16 GHz). This compares to a range of about 4-8 GHz when conductive lines are used which are each about 125 microns wide. In the case of multi-chip module substrates for computer systems, narrow-line width and spacing are highly desirable characteristics. Specifically, these characteristics enable a greater degree of circuit density to be achieved, as well as other peripheral benefits.
However, problems often result when the production of fine-geometry circuit lines (e.g. each having a width of about 15-75 microns which are spaced apart from each other by about 20-75 microns) is attempted using conventional technology. For example, etching at a constant rate is critical to the success of fine geometry circuit formation. Constant-rate etching controls the degree of "undercut" and therefore maintains fine-line dimensions with tight, highly controlled tolerances. The term "undercut" is traditionally defined to involve lateral etching of the metal layer beneath the edges of the photoresist layer. Excessive undercut results in insufficient circuit line width, thereby increasing the risk of circuit breaks and opens. Insufficient undercut results in excessive circuit line width and inadequate circuit line spacing.
Constant-rate etching does not normally occur when conventional etching processes are used. For example, with respect to the system described above in which gold is etched using a solution of dissolved I.sub.2 /KI, the etching rate slows substantially due to the depletion of I.sub.2 and KI, as well as the accumulation of dissolved gold by products/complexes in the etchant. As this occurs, the etching rate progressively diminishes, thereby making it difficult to determine the amount of time necessary for completion of the etching process. This requires the system operator to continuously remove, rinse, and examine the substrates being etched. It may then be necessary to return the substrates to the etchant for additional etching. This process frequently results in excessive etching time, different/inconsistent degrees of etching, and uneven/uncontrolled undercut. As a result, the consistent production of fine-geometry circuit structures is prevented.
In view of these problems, conventional thick film fabrication technology (which is used as a low-cost alternative to thin film fabrication technology) is limited with respect to the dimensional circuit geometry which may be produced. For the purposes of this invention, "thick film fabrication technology" shall be defined as the screen printing of a metal ink known in the art onto a substrate (e.g. ceramic) and subsequent sintering of the substrate at controlled temperature levels. The metal ink used for this purpose typically consists of a metal powder suspension in a liquid with rheology control agents therein. The final product consists of a printable paste. Thick film fabrication technology in combination with currently-known etching techniques is traditionally limited to the production of circuit patterns in which the width of each circuit line is not less than about 100 microns (typically about 125 microns), with the distance between adjacent lines being not less than about 100 microns (typically about 125 microns). Thus, conventional thick film fabrication technology in combination with conventional etching techniques will not permit a sufficiently fine degree of circuit geometry to be achieved.
In contrast, conventional thin film fabrication technology is able to provide finer geometries. However, such technology is expensive and cannot withstand temperatures in excess of about 500 degrees C. which are often encountered when thick-film capacitors and resistors are produced for use in connection with the thin film circuit. Thus, a significant need remains for a circuit fabrication method which uses thick-film fabrication technology while allowing the production of fine-geometry circuit lines. The present invention accomplishes these goals in an effective manner through the use of a unique and specialized constant-rate etching process described in greater detail below. Likewise, the present invention also allows such goals to be accomplished while minimizing the use of expensive metals, minimizing the generation of undesirable chemical wastes, and enhancing the overall efficiency of the circuit fabrication process.